This disclosure relates to integrated circuit devices, and more specifically, to a method and structure to create advanced e-Fuse structures in semiconductor devices.
As the dimensions of modern integrated circuitry in semiconductor chips continue to shrink, conventional lithography is increasingly challenged to make smaller and smaller structures.
Fuses are utilized within integrated circuit devices for a variety of purposes, such as programming certain functionality into the device or to enable or disable various devices within the circuit device. Such fuse structures can break electrical connections (such as in physically destroyable fuses or anti-fuses). Some fuse structures rely upon a smaller cross-sectional area between the anode and cathode and the fuse element. As the dimensions of the circuitry become ever smaller, it is desirable to reduce the voltage needed to program integrated circuits.
Thus, it is desirable to provide processes which can be used to make improved fuse structures for integrated circuitry.